Tiered In-Memory Computing with Flash Memory

Tiered In-Memory Computing with Flash Memory

Schedule
June 20, 11:45am
Room
Matterhorn 3
Track

Real-time analytic processing often involves substantially large datasets, well beyond what can be cost-effectively accommodated in memory. The next generation of Flash memory technologies offer not just improvement in price/performance over disk, but when used as a RAM extension, they can also offer substantial cost-reduction without an equivalent degradation in performance.

Join this session to learn how a tiered approach to memory access including RAM and Flash can deliver >3M ops/sec at <1 ms latencies at over 80% reduction in the cost of computing.

We will address a genome dataset processing scenario and the use of encoding, HASH tables and Redis on Flash to achieve real-time genome data analysis at substantially reduced costs.

 

Speakers
Kamran
Yousaf
Solution Architect
at
Redis Labs
Kamran Yousaf

Kamran Yousaf is a Solution Architect at Redis Labs, he specialises in development of distributed, high performance, low latency architectures. During this time, he has worked with a wide range of technologies and architectures from rule based development, grid and low latency application to enterprise file sync and share. Most recently he was VP engineering at a UK start-up SME, a leader in enterprise file sync and share. Previously he has worked at GigaSpaces, BEA and Versata.